This invention relates to circuits and method for testing inverter drive logic switching pattern signals and, more particularly, to built-in-test circuits for three phase inverters and the test methods performed by those circuits.
DC link, variable speed constant frequency (VSCF) power systems, such as those designed for aircraft applications, include a variable speed generator whose output is rectified to produce a DC voltage, and an electronic inverter which converts the DC voltage to a constant frequency AC output. Such inverters incorporate waveform generating circuits which drive power transistors to produce a quasi-sinewave which is filtered to produce a sinewave output. Typical inverter drive logic (IDL) circuits produce pulse width modulated waveform switching signal patterns which are used to control the switching of the output power poles of the inverter to produce a quasi-sinewave of low harmonic content that can be easily filtered. A typical IDL circuit produces four pulse width modulated waveform switching patterns to drive each output phase of the inverter. Two of the waveform patterns would be used to switch a positive (upper) semiconductive switch on and off, respectively, while the other two waveform patterns would be used to switch a corresponding negative (lower) semiconductor switch on and off. For a three phase inverter, twelve pulse width modulated switching signals are required. These signals are typically low level transistor-transistor logic (TTL) signals.
Previous build-in test (BIT) circuits for inverter drive logic function monitored a periodic waveform marker output of the IDL by using a power controller computer. However, this waveform marker did not contain any information about the operational status of the individual pulse width modulated switching signals. It is therefore desirable to devise an inverter drive logic built-in-test scheme which can determine the operational status of all twelve of the individual IDL waveform pattern switching signals.